# Encoder (digital)

A General encoder's block diagram.

A simple encoder or simply an encoder in digital electronics is a one-hot to binary converter. That is, if there are 2n input lines, and at most only one of them will ever be high, the binary code of this 'hot' line is produced on the n-bit output lines.

For example, a 4-to-2 simple encoder takes 4 input bits and produces 2 output bits. The illustrated gate level example implements the simple encoder defined by the truth table, but it must be understood that for all the non-explicitly defined input combinations (i.e., inputs containing 0, 2, 3, or 4 high bits) the outputs are treated as don't cares.[1]

It is the reverse of a Decoder in its function.

Gate level circuit diagram of a single bit 4-to-2 line encoder
4 to 2 Simple Encoder
I3I2I1I0O1O0V
0000xx0
0001001
0010011
0100101
1000111

If the input circuit can guarantee at most a single-active input, a simple encoder is a better choice than a priority encoder, since it requires less logic to implement but if not this become the major disadvantage of simple encoder that is they can generate the wrong output when there is more than one input present in a high state (logic state “1”). To rectify this problem a Priority encoder is used. They act on the request of higher priority and the rest cases go in "don't care condition".

## Types of encoder

### ${\displaystyle 2^{n}}$-to-n encoders

A ${\displaystyle 2^{n}}$-to-n encoder has n number of outputs in correspondence to the ${\displaystyle 2^{n}}$ number of inputs. It thus reduces the number of transmission lines and can be compared to a multiplexer.only one of the inputs become "high" (logic state "1") at a time.

Some typical examples would be 4:2 encoder, 8:3 encoder, 16:4 encoders etc.

#### 4-to-2 encoder

A simple 4:2 Encoder using OR gate.

#### 8-to-3 encoder

The image represent a 8:3 encoder. 4 input OR gates have been just for simplicity one can also use 2 2inputs OR gates.
A Truth Table representing 8:3 Encoder.
INPUT OUTPUT
a[7] a[6] a[5] a[4] a[3] a[2] a[1] a[0] d[2] d[1] d[0]
0 0 0 0 0 0 0 0 X X X
0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 1 0 0 0 1
0 0 0 0 0 1 0 0 0 1 0
0 0 0 0 1 0 0 0 0 1 1
0 0 0 1 0 0 0 0 1 0 0
0 0 1 0 0 0 0 0 1 0 1
0 1 0 0 0 0 0 0 1 1 0
1 0 0 0 0 0 0 0 1 1 1
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